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Use digital signal controllers for robust power line communication--Part I Power line communications provides a low-cost network with a ready-made infrastructure. Digital signal controllers provide the high level of processing needed to maintain robust signals on PLC networks, with performance overhead and on-chip peripherals that keep system costs down. See why.
By
Dr. Arefeen Mohammed, Texas Instruments
Courtesy of
Network Systems Designline (Related)
(04/25/2007 1:04 PM EDT)
Lighting, metering and other control applications often exist in factories or outdoors where the environment is harsh, making network communications difficult if not impossible by ordinary means. Not only is it likely that there is considerable environmental interference with the signals, but in many cases, if dedicated communications wiring does not already exist, it is prohibitively expensive to install. In these situations, the best medium to establish control network communications (Related) may be the power lines that are already installed.
Power line communications (PLC) is an ideal solution for monitoring and control networks in a wide variety of networked industrial, utility and commercial applications. To be effective, however, PLC must be both robust and cost-efficient; and for those features, system developers can turn to the performance and integration offered by digital signal controllers.
Unlike conventional networks that use dedicated transmission lines, PLC networks can transmit and receive data over many kilometers via existing low-, medium- and high-voltage power lines. Digital signal controllers, based on high-performance digital signal processor (DSP) technology, enable reliable PLC throughput to full-scale networks over a wide area in harsh environments, making it possible to monitor and control all network nodes. The highly integrated controllers also reduce system costs and adapt readily to changing network requirements. In factories, utility distribution systems, office complexes, mines, undersea cabling and other rugged settings, digital signal controllers support robust PLC transmission at rates that enable real-time monitoring and control.
Single-chip modem and application
In many monitoring and control applications, because cost is an overriding consideration, the more integrated the system, the better. PLC system functions can be broken into three parts: the analog (Related) front end (AFE), which receives and drives signals and separates them from the power signal; the modem, which modulates and demodulates the communications signal using specified frequencies and keying techniques; and the metering or control application. While many design approaches use separate controllers for the modem and application, one important advantage that digital signal controllers bring to PLC design is that they can integrate both functions in a single device.
The DSP at the core of a digital signal controller offers far more computational performance than that of a comparably priced RISC-based microcontroller (MCU), sufficient to perform both the modem and the application software. In addition, the on-chip peripherals are chosen specifically for control requirements, providing a system solution. Together, the performance and integration save system components and board space, benefiting cost-sensitive applications such as dimmable lighting ballasts, e-meters and motor drives. In addition, DSP programmability makes the system more adaptable to environmental interference, thus improving the reliability of transmissions, and the extra MIPS of a DSP can enable the addition of features like power factor correction that make end products more energy efficient.
Robust communications
Because of the harsh environments in which PLC is typically used, transmissions have to be robust. Of the different physical layer modulation schemes that can be used for transmitting bits, two that are favored for industrial monitoring and control are frequency shift keying (FSK) and binary phase shift keying (BPSK). Since neither of these schemes depends on the power signal as a carrier, they can be used on both adaptive current (AC) and direct current (DC) power lines at any voltage level and at any AC (Related) frequency. FSK and BPSK can also function when the nodes are down during a power outage, as long as power is supplied separately for the control communication electronics.
FSK transmits at two different frequencies, with 74 kHz used for 1 values and 63.3 kHz for 0 values. BPSK transmits at the same frequency for both values, but shifts the phase by 180 degrees between 1s and 0s. CEA 179, the standard commonly used for monitoring and control communications, specifies BPSK transmissions at 131.5 kHz and a baud (Related) rate of 5.5 kilobits per second, or 24 cycles per symbol. Although FSK is not specified by CEA-179, it is fully compatible with the protocol stack of the standard and thus can be used for CEA-179 transmissions. Within system constraints, a digital signal controller is capable of shifting the transmission frequencies in order to evade interference and improve communications.
CEA-179 packets, shown in Figure 1, are designed for reliability. The packet and bit boundaries are identified with a 24-bit pattern for bit synchronization, followed by an 11 bit (Related) word synchronization signal that signifies the start of data. The transmitter encodes each 8-bit (Related) command as an 11-bit word, which the receiver decodes and shifts into a memory buffer. In PLC, a 16-bit (Related) cyclical redundancy check (CRC) is added to the command data for verification, and then the end of the packet is identified by an 11-bit word that is repeated. The CEA-179 protocol, together with BPSK and FSK, ensure that PLC transmissions are robust and offer sufficient bandwidth (Related) for real-time control of multiple nodes.
Figure 1. CEA-179 Packet Format
PLC Design
An example design illustrates the straightforward implementation of PLC using a digital signal controller. Figure 2 shows the block diagram (Related) of a PLC communications and control system for an AC environment that might be used for, say, a dimmable ballast application. The AFE receiver-transmitter is on the left side of the diagram, and the modem and application algorithms run on the controller in the middle. The right side will contain the application circuitries. For example in a current solution a metering chip is connected with C2000. The metering chip (Related) performs the metering function and C2000 transmits the metering data using PLC. The discussion emphasizes FSK modulation; however, the same design can work for BPSK with some modifications in the AFE and control algorithm.
Figure 2. PLC System Block Diagram
The digital signal controller used in the design is a device with a DSP core that supplies 100 MIPS of performance at 100 MHz. In an ordinary application, approximately 45 MIPS is used for the modem, leaving about 55 MIPS free for running the application. Of the 34 kilobytes (KB) of flash and one-time-programmable memory provided on the chip, 12 KB are used for modem code; of the 12 KB of data memory, 5 KB are used by the modem. The rest of these memories remains for use by the application. Six pulse-width modulated (PWM) outputs with individual timers are available for signaling by both the modem and the application. A single 12-bit analog-to-digital (ADC) converter channel is used for sampling received communications, leaving 15 ADC channels free. SPI and SCI interfaces are available for local communication, along with more than 30 channels of general-purpose I/O.
About the Author
Dr. Arefeen Mohammed is a TMS320C2000 System Application Engineer at Texas Instruments
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